This course is a full VHDLcourse , with complete and detailled explanations of the VHDLsyntax and VHDL constructs with concrete examples. We also explain the different steps in the Hardware design process, and how to get from an algorithmic Model of the desired Hardware to a fully functional VHDL coded Hardware design.The course also gives a small introduction to FPGAs for those who will be working on FPGAs.

The class finishes with the Functional Verification part which gives the student a complete VHDL Testbench of an example CPUALU design. We go through each line of code in the testbench and explain it. This will give the student, the background it needs to code his own testbench for his own specific design.